Workaround for DRV8301 errata

The DRV8301 (used in Odrive v3.5-48v, amongst others) has an errata on the datasheet:

The DRV8301 gate drivers may not correctly power up if a voltage greater than 8.5 V is present on any SH_X pin when EN_GATE is brought logic high (device enabled) after PVDD1 power is applied.

The SH_X pin is directly connected to the motor terminals.

For ODrive, that seems to mean the gate driver won’t work properly if the motor is already spinning when the odrive is reset or powered up. That presents problems for things like wind turbines, hydro generators, and anything else where the motor is probably always spinning.

The symptoms I’ve seen are that the low side overcurrent fault flags (eg. FETLA_OC) get set whenever this is the case, although sometimes with a delay of a few milliseconds.

Is there any known workaround? Does the chip work properly if you just disable overcurrent protection, or is this flagging up a real fault because the mosfet gate isn’t being driven completely during powerup?

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Hmm I haven’t seen that errata being something that people run into often, let alone it being worked around before. So I’m not sure what to recommend.
The ODrive Pro and ODrive S1 use the DRV8353 and so should hopefully not have this issue.

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